Hi,

With the following code I'm trying to getting the TIM2 of the STM32G0B1RE triggering interrupt every second. But did not get any interrupt at all, I'm using the PAC crate, no HAL.
Code is building I'm able to load and execute it, but only seeing the "Hello, world!" string.
Testing on NUCLEO-G0B1RE, only board available for me.

I'm not changing the clock configuration as the "default" is HSI16 and is enough for me testing.

#![no_std]
#![no_main]

use cortex_m_rt::entry;
use panic_halt as _;
use rtt_target::rtt_init_print;
use stm32g0::stm32g0b1;
use stm32g0::stm32g0b1::{interrupt, Interrupt, NVIC};

#[entry]
fn main() -> ! {
    rtt_init_print!();
    rtt_target::rprintln!("Hello, world!");

    // Take the peripherals
    let peripherals = stm32g0b1::Peripherals::take().unwrap();
    
    // Take the Rest and Clock Control (RCC) peripheral
    let rcc = &peripherals.RCC;

    // Initialize the TIM2 peripheral, interrupt every second, default clock is HSI16
    let tim2 = &peripherals.TIM2;
    rcc.apbenr1().modify(|_, w| w.tim2en().set_bit()); // Enable TIM2 clock
    tim2.cr1().write(|w| w.cen().clear_bit());             // Disable TIM2
    unsafe { tim2.psc().write(|w| w.psc().bits(1_600)); }    // Set prescaler to 160
    unsafe { tim2.arr().write(|w| w.arr().bits(10_000)); } // Set auto-reload value to maximum

    // enable interrupt
    NVIC::unpend(Interrupt::TIM2);
    unsafe {
        NVIC::unmask(Interrupt::TIM2);
    }

    tim2.dier().modify(|_, w| w.uie().set_bit());
    // Enable TIM2
    tim2.cr1().modify(|_, w| w.cen().set_bit());

    loop {
        cortex_m::asm::wfi();
        rtt_target::rprintln!("Some interrupt triggered!");
    }
}

#[interrupt]
fn TIM2() {
    let peripherals = stm32g0b1::Peripherals::take().unwrap();
    let tim2 = &peripherals.TIM2;
    if tim2.sr().read().uif().bit_is_set() {
        rtt_target::rprintln!("TIM2 interrupt triggered!");
        tim2.sr().modify(|_, w| w.uif().clear_bit()); // Clear the update interrupt flag
        NVIC::unpend(Interrupt::TIM2);
    }
}

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